The interfacial layer in a Schottky barrier solar cell (SBSC) plays an important role in reducing the dark current, blocking the majority carriers injected into the frontal electrode at forward bias, reducing surface recombination velocity and passivating silicon surface. All these effects reflect into an improvement of the device performance. Interfacial layers between the semiconductor and the metal realized with a low thermal budget are highly desirable in solar cell processing technology. In the present paper we realize and test the passivation properties of graphene oxide (GO) thin films dip coated on silicon wafers. Wafer passivation is monitored through contactless determination of the effective minority carriers lifetime (eff) from quasi-steady-state photoconductance (QSSPC) data. The best passivating GO layer has been tested as interfacial layer in silicon based SBSC. The realized device exhibits better performances in terms of external quantum efficiency (EQE) and power conversion efficiency (PCE) respect to a SBSC reference device.
Graphene oxide as an interfacial layer in silicon based schottky barrier solar cells
Delli Veneri, P.;Della Noce, M.;Bobeico, E.;Lancellotti, L.
2015-01-01
Abstract
The interfacial layer in a Schottky barrier solar cell (SBSC) plays an important role in reducing the dark current, blocking the majority carriers injected into the frontal electrode at forward bias, reducing surface recombination velocity and passivating silicon surface. All these effects reflect into an improvement of the device performance. Interfacial layers between the semiconductor and the metal realized with a low thermal budget are highly desirable in solar cell processing technology. In the present paper we realize and test the passivation properties of graphene oxide (GO) thin films dip coated on silicon wafers. Wafer passivation is monitored through contactless determination of the effective minority carriers lifetime (eff) from quasi-steady-state photoconductance (QSSPC) data. The best passivating GO layer has been tested as interfacial layer in silicon based SBSC. The realized device exhibits better performances in terms of external quantum efficiency (EQE) and power conversion efficiency (PCE) respect to a SBSC reference device.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.