The adoption of chronic implantable peripheral nerve-based prosthetic devices is currently hampered by the lack of a highly integrated neural signal acquisition systemon-chip (SoC). We report a ten-channel peripheral nervous system (PNS) electroneurogram (ENG) signal acquisition SoC within an implantable package. Requiring only four off-chip capacitors, this SoC can be co-encapsulated with flexible nerve electrodes and a resonant coil antenna to form a 3.4 cm3 and 3.9 g implantable device for chronic ENG acquisition. This SoC is inductively powered and controlled through a resonant coil at 22 MHz and transmits the digitized neural signal through a nearinfrared LED (NIR-LED). Fabricated in 0.18-μm CMOS, each amplifier channel exhibits an input referred noise of 1.9 μVrms and a noise efficiency factor (NEF) of 4.0 within the signal bandwidth of 5.5 kHz. Each amplifier channel within the SoC is digitized with 10-bit resolution at 17.5 ksps, and the total power consumption (SoC and NIR-LED) is 4.4 mW when the NIR-LED is driven at 3 Mb/s. An electrode impedance measurement circuit with <10% magnitude and <8° angle error for measuring impedances up to 1 MΩ is also incorporated in this SoC. This wireless, low noise ENG acquisition SoC package has been validated in vivo while implanted on a rodent to acquire ENG from its sciatic nerve.
A Wireless Multi-Channel Peripheral Nerve Signal Acquisition System-on-Chip
Bossi S.;
2019
Abstract
The adoption of chronic implantable peripheral nerve-based prosthetic devices is currently hampered by the lack of a highly integrated neural signal acquisition systemon-chip (SoC). We report a ten-channel peripheral nervous system (PNS) electroneurogram (ENG) signal acquisition SoC within an implantable package. Requiring only four off-chip capacitors, this SoC can be co-encapsulated with flexible nerve electrodes and a resonant coil antenna to form a 3.4 cm3 and 3.9 g implantable device for chronic ENG acquisition. This SoC is inductively powered and controlled through a resonant coil at 22 MHz and transmits the digitized neural signal through a nearinfrared LED (NIR-LED). Fabricated in 0.18-μm CMOS, each amplifier channel exhibits an input referred noise of 1.9 μVrms and a noise efficiency factor (NEF) of 4.0 within the signal bandwidth of 5.5 kHz. Each amplifier channel within the SoC is digitized with 10-bit resolution at 17.5 ksps, and the total power consumption (SoC and NIR-LED) is 4.4 mW when the NIR-LED is driven at 3 Mb/s. An electrode impedance measurement circuit with <10% magnitude and <8° angle error for measuring impedances up to 1 MΩ is also incorporated in this SoC. This wireless, low noise ENG acquisition SoC package has been validated in vivo while implanted on a rodent to acquire ENG from its sciatic nerve.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
