The main role of the ITER Radial Neutron Camera (RNC) diagnostic is to measure in real time the plasma neutron emissivity profile at high peak count rates for a time duration up to 500 s. Due to the unprecedented high-performance conditions and after the identification of critical problems, a set of activities have been selected, focused on the development of high-priority prototypes, and capable to deliver answers to those problems before the final RNC design. This paper presents one of the selected activities: the design, development, and testing of a dedicated field-programmable gate array (FPGA) code for the RNC data acquisition prototype. The FPGA code aims to acquire, process, and store in real time the neutron and gamma pulses from the detectors located in collimated lines of sight (LOS) viewing a poloidal plasma section from the ITER Equatorial Port Plug 1. The hardware platform used was an evaluation board from Xilinx (KC705) carrying an IPFN FPGA Mezzanine Card (FMC-AD2-1600) with two digitizer channels of 12-bit resolution sampling up to 1.6 Gsamples/s. The code performs the proper input signal conditioning using a down-sampled configuration to 400 Msamples/s, applies dedicated algorithms for pulse detection, filtering and pile up (PU) detection, and includes two distinct data paths operating simultaneously: 1) the event-based datapath for pulse storage and 2) the real-time processing with dedicated algorithms for pulse shape discrimination (PDS) and pulse height spectra (PHS). For continuous data throughput, both datapaths are streamed to the host through two distinct PCIe × 8 direct memory access (DMA) channels.

FPGA Code for the Data Acquisition and Real-Time Processing Prototype of the ITER Radial Neutron Camera

Riva M.;Pollastrone F.;Centioli C.;Marocco D.;Esposito B.;
2019

Abstract

The main role of the ITER Radial Neutron Camera (RNC) diagnostic is to measure in real time the plasma neutron emissivity profile at high peak count rates for a time duration up to 500 s. Due to the unprecedented high-performance conditions and after the identification of critical problems, a set of activities have been selected, focused on the development of high-priority prototypes, and capable to deliver answers to those problems before the final RNC design. This paper presents one of the selected activities: the design, development, and testing of a dedicated field-programmable gate array (FPGA) code for the RNC data acquisition prototype. The FPGA code aims to acquire, process, and store in real time the neutron and gamma pulses from the detectors located in collimated lines of sight (LOS) viewing a poloidal plasma section from the ITER Equatorial Port Plug 1. The hardware platform used was an evaluation board from Xilinx (KC705) carrying an IPFN FPGA Mezzanine Card (FMC-AD2-1600) with two digitizer channels of 12-bit resolution sampling up to 1.6 Gsamples/s. The code performs the proper input signal conditioning using a down-sampled configuration to 400 Msamples/s, applies dedicated algorithms for pulse detection, filtering and pile up (PU) detection, and includes two distinct data paths operating simultaneously: 1) the event-based datapath for pulse storage and 2) the real-time processing with dedicated algorithms for pulse shape discrimination (PDS) and pulse height spectra (PHS). For continuous data throughput, both datapaths are streamed to the host through two distinct PCIe × 8 direct memory access (DMA) channels.
DAQ; field-programmable gate array (FPGA); ITER; nuclear fusion; real-time processing
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.12079/52245
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